Statement for Karthikeyan Sankaralingam
نویسنده
چکیده
My experience as a graduate student spans several areas in computer architecture and VLSI, including circuit analysis, physical design, logic design, verification, processor microarchitecture, and application studies. My dissertation research focuses on the design of the TRIPS architecture and its polymorphous capabilities. In the TRIPS chip implementation project, I led the microarchitecture specification, hardware verification, and physical design, and through this experience developed an extensive set of skills spanning a wide spectrum of computer system design. In this statement, I summarize the contributions of my dissertation research, describe my role in the implementation of the TRIPS chip, and outline my plans for future research.
منابع مشابه
Energy Efficient Computing through Compiler Assisted Dynamic Specialization
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x
متن کاملOpen-source Hardware: Opportunities and Challenges
Innovation in hardware is slowing due to rising costs of chip design and diminishing benefits from Moore’s law and Dennard scaling. Software innovation, on the other hand, is flourishing, helped in good measure by a thriving open-source ecosystem. We believe that open source can similarly help hardware innovation, but has not yet due to several reasons. We identify these reasons and how the ind...
متن کاملGet the Parallelism out of My Cloud
The hardware trend toward multicore processors has so far been driven by technology limitations of wire delays, power efficiency, and limited capability to exploit instruction-level parallelism. Software evolution has lead to the rise of the cloud. This multicore + cloud evolution provides several challenges and has led to a call for parallelism. In this paper, we first examine the drivers behi...
متن کاملTowards an Optimal File Allocation Strategy for SPECweb99
This paper studies the file caching characteristics of the industry-standard webserving benchmark SPECweb99 and develops an optimal cost model for balancing performance and disk and RAM costs, where "cost" can be very broadly defined. The model is applied to a realistic 32-bit address hardware configuration to demonstrate a solution that eliminates file accesses as a potential webserving bottle...
متن کاملMapReduce for the Cell Broadband Engine Architecture
In this paper, we propose the evaluation of MapReduce on the Cell processor by way of the Marchine Cubes application. We argue that the Cell architecture and the MapReduce parallel programming model complement each other well, and that the Marching Cubes application is a good application through which to evaluate this potential synergy. For the interested reader, a preliminary design and plan o...
متن کامل